A
Frequency Doubler for Class D 630m Amplifiers
This
circuit is a frequency doubler designed to drive class D push-pull amplifiers
on the 630m band.
While class D amplifiers are very efficient and produce high output powers,
push pull designs
frequently require a signal at twice the required frequency in order to
accurately generate 2 square waves that are 180 degrees out of phase. The
input range of this doubler is 472kHz to 479kHz at
a level from +6 to +13dBm.
The output is a sinewave at the 2 x the input frequency.
Fundamental feedthrough from the 475kHz
drive is better than 60dB below the wanted 2nd harmonic.
This
block diagram shows how a transceiver that can output a low level signal on 475kHz
can be used with modes like WSPR JT9 and JT65
The
circuit has 2 parts:
1) A trifilar wound
transformer which provides balanced drive to two 1N1418 silicon diodes. The
drive waveform to D1 is in phase with the input, while the signal at D2 is 180
degrees out of phase. The diodes act as a full wave rectifier which has an
output frequency that is double that of the input.
This technique works from mains at 50/60Hz up through the microwave spectrum.
2) A buffer amplifier with a tuned circuit in the collector
resonates at the second harmonic at 950kHz, this converts the
rectified waveform back to a sinewave.
Figure
1
630m Frequency Doubler
Construction
and testing.
The circuit was constructed on a sheet of copper clad PCB material.
3dB resistive attenuators were added to the input and output to help
ensure the accuracy of measurements.
The circuit was built and a signal swept between 300kHz
to 2500kHz applied to the base of TR1.
The output was examined on a spectrum analyser and the value of C3 adjusted
until the peak in response was close to 950kHz.
– With 30 turns on the primary of L3 the inductance was calculated as
4.4uH but measured as 5uH. A
little calculating and a lot of trial and error produced a value of C3
comprising of 4700pF + 1nF + 470pF + 220pF in parallel.
The resonant frequency was measured as 955.8kHz.
With R5 to damp the Q, the -3dB bandwidth was 46.7kHz
To
measure the input and output levels, a sinewave at 475kHz
was applied via a 3dB attenuator to the input winding of L1. This 50 Ohm
attenuator ensures a reasonable match between the signal generator and the trifilar
transformer. In the table below the signal generator output level is given,
but it should be remembered that the input to the doubler circuit is 3dB below
that level. The Output level shown
in the table was the level of second harmonic measured
across R9, i.e. after another -3dB pad.
Figure
2
Frequency
doubler for 630m
Frequency
doubler test results.
Sig gen output level at 475kHz
(dBm) |
Measured
950kHz output (dBm) |
0 |
-34 |
+1 |
-25 |
+2 |
-17 |
+3 |
-11 |
+4 |
-6 |
+5 |
-3 |
+6 |
0 |
+7 |
+1.75 |
+8 |
+3 |
+9 |
+3.6 |
+10 |
+4 |
Spectral
Response.
The 2 spectrum analyser images below show a wideband spectrum from 300kHz
to 5MHz and a narrower view from 300kHz to 2500kHz.
Note the very low level of feed through from the 475kHz
source which is better than 60dB below the wanted frequency of 950kHz. The
signal generator was set to +10dBm for this test. (So +7dBm at the input to
L1) The 1N4148 diodes used were not matched, but were taken from the same
production batch.
Figure
3
Doubler
output spectrum. 1)
2nd harmonic at 950kHz
2) 3rd harmonic 3)
4th harmonic at 1900kHz
Figure 4 This image shows how the circuit produces even harmonics.
This last spectrum analyser image shows the
even harmonics up to the 10th at 4.75MHz.
At the far left, marker
4 has been placed on the 475kHz feedthrough, this is at around 65-70dB below
the wanted signal.
Conclusion.
From the results, it can be seen that when the losses of the two 3dB
attenuators are omitted, the doubler can produce +7dBm output for an input
signal of +7dBm.
It can also be seen from the table that input levels below +3dBm do not fully
drive the circuit. For optimum results, input levels between +6dB and +13dBm
at the input transformer should be used.
The supply requirements are very modest, with no signal the current into the
amplifier is 5mA.
A tuned amplifier was designed as the adjustments necessary for different
power levels are minimal and my particular Class D amplifier uses a HEF4013
D-Type which has a Schmitt trigger on the clock input.
To quote from the NXP datasheet
“The
clock input’s Schmitt-trigger action makes the circuit highly tolerant of
slower clock rise and fall times.”
It may also be possible to replace the tuned circuit with an RF choke and use TR1 as a squaring circuit. That would be easier to build and align, but may be more sensitive to differing levels of drive power. A squarer circuit running from 12V could be DC coupled to the input of the 4013 and DC bias resistor R1 removed.
G0MRF
05/Sept/2016